MCU Agent Glossary — 18 Key Terms Defined
MCU Agent Glossary
Precise definitions for the 18 terms that appear most frequently across this site, written for developers who may be coming from software rather than embedded backgrounds.
MCU — Microcontroller Unit
A single integrated circuit containing a processor core (typically Cortex-M, Xtensa, or RISC-V), SRAM, flash memory, and peripheral controllers (ADC, I2C, SPI, UART, timers) on one die. MCUs are designed for embedded, real-time, and power-constrained applications. They differ from microprocessors (MPUs) in that SRAM and flash are on-chip rather than external. Examples: ESP32-S3, STM32H743, RP2040, nRF52840, ATmega328P.
MPU — Microprocessor Unit
A processor die that requires external DRAM and storage. MPUs run operating systems (Linux, Android, Windows IoT). They have more compute power and addressable memory than MCUs, but consume more power and are more complex to design around. Examples: Raspberry Pi 5 (BCM2712, Cortex-A76), STM32MP157 (Cortex-A7 + Cortex-M4 hybrid). In embedded AI contexts, MPUs run heavier inference and LLM workloads that MCUs cannot.
SoC — System on Chip
A broader term than MCU or MPU: a single die containing a complete system, potentially including CPU cores of multiple types, GPU, NPU, wireless subsystems, and peripheral controllers. Both MCUs and MPUs are forms of SoC. The term is more commonly used for mobile/edge SoCs (Qualcomm Snapdragon, Apple Silicon, NXP i.MX RT series with integrated HiFi DSP).
RTOS — Real-Time Operating System
A lightweight operating system designed for deterministic task scheduling with bounded interrupt latency. An RTOS provides: cooperative or preemptive task scheduling, inter-task communication (queues, semaphores, mutexes), and timer services. It does not provide a filesystem, memory management unit (on Cortex-M0/M3), or network stack natively — those are add-on components. Common RTOSes: FreeRTOS, Zephyr, ThreadX (Azure RTOS), embOS.
FreeRTOS
The most widely deployed open-source RTOS for Cortex-M class MCUs. Developed by Real Time Engineers Ltd., now maintained by Amazon under an MIT license. FreeRTOS provides a preemptive scheduler, 256-priority task model, queues, semaphores, software timers, and event groups. It is used in ESP-IDF (Espressif’s SDK) and countless commercial products. Its minimal kernel footprint is approximately 5–10 KB of flash and 2–3 KB of RAM.
Zephyr RTOS
A Linux Foundation open-source RTOS supporting over 500 boards as of 2026. Zephyr takes an integrated OS approach: it includes a networking stack (IPv4/IPv6, Bluetooth LE, Wi-Fi, LoRaWAN, Thread), file systems, USB, device driver subsystem (with unified sensor API), and MCUboot for OTA updates — all under one build system (CMake + west + Kconfig + Device Tree). Heavier than FreeRTOS at the kernel level (~2× flash and RAM) but often lighter at the full-system level when networking and OTA are included.
TinyML
The practice of deploying trained machine learning models — primarily neural networks — on microcontrollers and other deeply resource-constrained devices with kilobytes to low megabytes of SRAM and no GPU. TinyML workflows involve training on a workstation or cloud, quantizing the model to int8 or int16, converting to an on-device format (TFLite flatbuffer, ONNX), and running inference with a lightweight runtime (TFLM, microTVM, Edge Impulse EON). TinyML is the inference layer; it is not an agent architecture.
TensorFlow Lite Micro (TFLM)
Google’s C++ inference runtime for microcontrollers, derived from TensorFlow Lite. TFLM requires no dynamic memory allocation (the activation arena is statically sized), no OS, and no filesystem. It supports a subset of TFLite operators sufficient for CNN, RNN, and MLP inference. The ESP-NN and CMSIS-NN libraries plug into TFLM as optimized kernel backends for Espressif and ARM Cortex-M targets respectively. Minimum viable TFLM footprint is approximately 20–30 KB of flash.
CMSIS-NN
ARM’s open-source Cortex Microcontroller Software Interface Standard — Neural Network kernels library. CMSIS-NN provides optimized convolution, depthwise convolution, pooling, and activation functions for Cortex-M4F, M7, and M33 targets. It exploits SIMD DSP instructions (SMLAD, SMLALD, etc.) and the FPU to accelerate int8/int16 inference. TFLM and STM32Cube.AI both use CMSIS-NN as their kernel backend on ARM Cortex-M targets.
ESP-NN
Espressif’s equivalent of CMSIS-NN for the Xtensa LX7 core and its 128-bit vector ISA (QR registers). ESP-NN provides optimized convolution and activation kernels for the ESP32-S3’s SIMD extensions, yielding 2.5–6.25× throughput improvement over non-vectorized code. TFLM and the Edge Impulse EON compiler automatically select ESP-NN kernels when targeting ESP32-S3.
NPU — Neural Processing Unit
A dedicated hardware block optimized for matrix multiply-accumulate operations, the dominant operation in neural network inference. NPUs differ from the CPU and FPU in that they operate on large matrices in parallel with much lower energy per operation. Most Cortex-M MCUs do not have NPUs; they rely on DSP extensions or vector ISAs instead. MCUs with NPUs: STM32N6 (ST Neural-ART Accelerator), some NXP i.MX RT1170 SoCs, GAP8 and GAP9 (GreenWaves Technologies). NPUs on MCU-class devices typically accelerate inference by 10–100× compared to CPU-only execution.
MQTT — Message Queuing Telemetry Transport
A lightweight publish-subscribe messaging protocol designed for constrained networks (low bandwidth, high latency, unreliable links). MQTT requires a broker (Mosquitto, EMQX, HiveMQ) that receives published messages and forwards them to subscribers. Protocol overhead is minimal: a PUBLISH packet has a 2-byte fixed header. MQTT 3.1.1 is the most widely supported version; MQTT 5.0 adds message expiry, topic aliases, and enhanced authentication. Default port: 1883 (cleartext), 8883 (TLS).
CoAP — Constrained Application Protocol
An application-layer protocol for constrained devices, defined in RFC 7252. CoAP uses UDP rather than TCP, making it lower-overhead than MQTT on severely battery-limited or NB-IoT devices. CoAP supports GET, PUT, POST, DELETE semantics (similar to HTTP) and has an observe extension for publish-subscribe-like behavior. Less widely supported by broker and cloud platforms than MQTT; typically used on mesh networks (6LoWPAN, Thread) where UDP’s connectionless model is a better fit.
OTA — Over-the-Air Update
The delivery of firmware or configuration updates to a device over its wireless interface without physical access. In MCU contexts, OTA usually involves: a dual-partition flash layout (active + candidate), downloading the new firmware to the candidate partition, verifying integrity (SHA-256) and authenticity (signature), and rebooting into the new partition. Rollback on failure is handled by a watchdog or explicit confirmation from the application. On ESP32: esp_ota_ops.h. On Zephyr: MCUboot. On STM32: SBSFU framework.
Edge Inference
Running ML model inference on a device close to the data source — an MCU, a gateway, an edge server — rather than in a central cloud. Edge inference reduces round-trip latency (from seconds to milliseconds for on-device), reduces bandwidth (only inference results, not raw data, are transmitted), and enables operation when connectivity is absent. On MCUs, edge inference means TinyML. On gateways, it may mean a quantized model running on a Raspberry Pi or a Jetson device.
Sensor Fusion
Combining data from multiple physical sensors — or from multiple measurement axes of a single sensor — into a single higher-level derived value or state. Examples: combining accelerometer + gyroscope readings via a Madgwick filter to compute orientation quaternions; combining temperature + humidity + pressure + CO₂ via the Bosch BSEC algorithm to compute an IAQ index; combining 3-axis vibration RMS values into a single anomaly score. Sensor fusion reduces the information the agent must reason about and improves robustness to individual sensor noise or failure.
Agent State Machine
A finite state machine (FSM) that governs the behavioral logic of an MCU agent. States represent modes (IDLE, DETECTING, ALERT, DELEGATE, OTA); transitions are triggered by sensor conditions, inference results, or received commands. The state machine is the “decision layer” of the agent: it accepts inputs from the sensing and inference layers, determines the appropriate action (actuate, publish, delegate, wait), and delegates execution to the action and communication layers. Testing the state machine in isolation on a host (without hardware) is best practice.
Sensor Abstraction Layer
A firmware layer that normalizes access to physical sensors behind a consistent API, hiding the differences between I2C, SPI, and UART sensor protocols, different register maps, and different unit conventions. In Zephyr, this is the sensor.h API: sensor_sample_fetch() and sensor_channel_get() work identically across any sensor with a Zephyr driver. In ESP-IDF and STM32Cube HAL, sensor abstraction is provided by BSP (Board Support Package) libraries or third-party driver components.
Term index
| Term | Definition |
|---|---|
| MCU | Single-chip processor + SRAM + flash + peripherals |
| MPU | Processor requiring external DRAM + storage |
| SoC | System-on-chip (broader: includes MCU, MPU, GPU, NPU) |
| RTOS | Real-time OS for deterministic embedded scheduling |
| FreeRTOS | Most deployed open-source RTOS for Cortex-M |
| Zephyr | Linux Foundation RTOS with full connectivity stack |
| TinyML | ML inference on constrained MCU-class devices |
| TFLM | TensorFlow Lite Micro — C++ MCU inference runtime |
| CMSIS-NN | ARM-optimized NN kernels for Cortex-M DSP/FPU |
| ESP-NN | Espressif-optimized NN kernels for ESP32-S3 vector ISA |
| NPU | Dedicated neural network hardware accelerator |
| MQTT | Lightweight pub-sub protocol for IoT |
| CoAP | UDP-based REST-like protocol for constrained devices |
| OTA | Over-the-air firmware update |
| Edge inference | ML inference at the device or gateway, not in cloud |
| Sensor fusion | Combining multiple sensors into a derived output |
| Agent state machine | FSM governing MCU agent behavior |
| Sensor abstraction layer | API normalizing sensor access across hardware |
Platform example: ForestHub.ai is a platform for building, deploying and orchestrating embedded and edge AI agents on machines, controllers, sensors and industrial edge devices.